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Eau Claire, Wis. - Agilent Technologies
has announced a new network switch and router chip that allows transfer speeds of one gigabit per second, using designs bought from a Wisconsin company.Silicon Logic Engineering
, a firm based in Eau Claire, designs application-specific integrated circuits and systems-on-a-chip. SLE announced this February the release of its implementation of System Packet Interface Level 4 Phase 2, or SPI 4.2, a network interface standard.
Agilent and six other companies license SLE's design. SLE and Agilent worked together to reach a gigabit-per-second transfer speed, which surpasses the previous record of 800 megabits per second, according to a statement from Agilent.
"Our silicon demonstration of a SPI-4.2 ASIC core operating at 1 Gb/s is an industry first and gives our networking customers the extra performance they need to competitively differentiate their products," said James Stewart, general manager of Agilent's ASIC Products Division.
The SPI 4.2 interface standard allows one network switch or router to support many telecommunications protocols. The Optical Internetworking Forum
developed it for physical and link-layer devices.
Agilent's core is a standard implementation but incorporates a real-time tuning algorithm. Agilent implemented the design using a 0.13-micron CMOS manufacturing process. To reach the higher speed, it could not change the fundamental architecture of the standard, but made an alteration to a part of the chip that affects receiver delay.
The company is aiming the product toward applications such as 10 Gb/s Ethernet, OC-192 ATM, and Packet over SONET/SDH.
SLE also licenses its design for use in six other implementations, most using 0.13-micron manufacturing processes. Licensees include IBM, which uses SLE's interface in two different 0.18-micron chip processes.
"High-end systems developers are demanding best-in-class third-party chip IP that is silicon-proven in leading semiconductor processes," said Jeff West, president of SLE.
"Our customers look to us to squeeze every ounce of performance out of new ASIC and IP technologies," West said.